The present invention relates broadly to delay lines in ECM systems, and in particular to a variable analog delay line.
There are several types of microwave delay mechanizations employed in ECM systems. One type of delay utilizes a conventional microwave memory loop, whereby a relatively broadband oscillator loop is loced at comb frequencies near the frequency of the incoming signal, and energy is switched out of the loop at appropriate delay times. Loop bandwidths are typically greater than several Gigahertz and the operation is noncoherent.
Another type of microwave delay first digitizes the incoming analog signal and then stores it in some form of digital memory. The stored signal is read out when desired. If the incoming signal is pulsed and sufficient memory is available, the memorized signal output replicates the frequency and phase response of the input signal. Unfortunately, this type of delay device works best on only one signal pulse train at a time, and high duty cycle input signals can completely tie up the unit, thereby not allowing it to be time shared for the storage of other signals. It is possible to parallel several of these digital memory devices in order to handle more input signals, but the high cost of an individual device usually precludes this luxury. It should also be noted that successful operation of relatively wideband digital memory devices is unproven in production of ECM systems, and the effect of spurious sidebands is yet to be determined.
The state of the art of delay line devices is well represented and alleviated to some degree by the prior art apparatus and approaches which are contained in the following U.S. Patents:
U.S. Pat. No. 4,024,480 issued to Reeder et al on May 17, 1977; PA1 U.S. Pat. No. 4,097,825 issued to Gerard on June 27, 1978; PA1 U.S. Pat. No. 4,099,146 issued to DeVries on July 4, 1978; PA1 U.S. Pat. No. 4,100,498 issued to Alsup et al on July 11, 1978 and PA1 U.S. Pat. No. 4,207,545 issued to Grudkowski et al on June 10, 1980.
The Reeder et al references discloses a surface acoustic wave tapped delay line that is programmable, both in amplitude and phase, to provide a general transversal filter apparatus in which a plurality of nonlinear frequency mixers, each responsive to the sensed signals from a corresponding one of the transducer taps for providing signal manifestations of the sum and difference frequencies of the surface acoustic waves impinging on the tap, each providing the signal magnifestation at a signal amplitude which is selectively adjustable to provide a desired transducer tap weighting and at a selected one of two phases which are displaced by 180.degree., the signal manifestations from each of the nonlinear frequency mixers being summed along a common signal line.
The Gerard reference provides a surface wave tapped delay line which utilizes spaced tapping output transducers disposed in the path of surface acoustic wave energy propagating along a planar substrate surface from an input transducer.
The DeVries reference describes an acoustic wave storage convolver which includes a plurality of sampling transducers coupled to a surface wave propagating medium along a path defined by a pair of opposedly disposed input transducers.
The Alsup et al reference relates to surface acoustic wave sampled data filters which can be utilized as serial access read-only memories to directly implement at carrier frequencies a coherent fast-frequency-hop synthesizer in the VHF and UHF ranges.
The Grudkowski eta l reference discloses a linear SAW signal processor apparatus which utilizes a plurality of taps of a SAW delay line which are each connected to a corresponding electronic device having a linear RF output voltage to DC bias current relationship, to provide corresponding output signal trains of RF signal chips, the amplitude of which is linearly related to a DC signal corresponding to the related tap and used for biasing the one of said devices associated therewith.
In FIG. 1 there is shown a typical prior art electronic countermeasure (ECM) delay circuit configuration, in which the input RF signal is first downconverted (through several downconversion stages) to the instantaneous bandwidth of a memory or delay device, stored or delayed for a specified period of time, and subsequently read out and upconverted to the original RF frequency. Because the RF delay must usually be available over an extremely large bandwidth, it is desired that the instantaneous bandwidth of the memory or delay device be as broad as possible. Narrow delay bandwidths require more parallel downconversion paths or at least more local oscillators and switches in order to fold the entire RF range into the delay bandwidth. In general, a practical ECM application would require that memory should be at least 400 MHz wide to be feasible for an ECM system.